It is often necessary in the electronic arts to evaluate expressions of the general form given in Eq. (1): EQU X.sup.(I,J) =F.sup.(I,N) *C.sup.(N,J) (1)
where X.sup.(I,J) is a matrix with dimensions (I,J), F.sup.(I,N) is a matrix with dimensions (I,N) and C.sup.(N,J) is a matrix with dimensions (N,J). For example, F can be a data stream while C is a coefficient matrix. F can also be a vector, i.e., a one-dimensional matrix.
It is known that such expressions can be evaluated by means of the following equation: ##EQU1## where i, j and p are indices. Examples of such functions are the Forward Discrete Cosine Transform (FDCT) and the Inverse Discrete Cosine Transform (IDCT) and Two Dimensional Discrete Fourier Transform (2-d DFT), and general matrix multiplication. Operations of the type illustrated by Eq. 2 are referred to generally as a Multiply-Accumulate, abbreviated as MA.
Because of the importance of MA operations in modem electronics, especially in communication electronics, there is an ongoing need for means and methods which permit MA operations to be carried out more quickly or with fewer resources or both. For example, it desirable to be able to perform such operations with simpler or more compact or higher speed microelectronic circuits or less on-chip memory or combinations of such advantages. It is especially desirable to be able to evaluate MA expressions such as Eqs. (1)-(2) while using less on-chip cache memory space.